Analog Filters in Nanometer CMOS (Springer Series in by Heimo Uhrmann, Robert Kolm, Horst Zimmermann

By Heimo Uhrmann, Robert Kolm, Horst Zimmermann

Ranging from the fundamentals of analog filters and the negative transistor features in nanometer CMOS 10 high-performance analog filters constructed by means of the authors in one hundred twenty nm and sixty five nm CMOS are defined broadly. between them are gm-C filters, current-mode filters, and lively filters for system-on-chip recognition for Bluetooth, WCDMA, UWB, DVB-H, and LTE functions. For the lively filters a number of operational amplifier designs are defined. The e-book, additionally, encompasses a evaluation of the latest nation of analysis on low-voltage low-power analog filters. to hide the subject of the ebook comprehensively, linearization concerns and dimension tools for the characterization of complicated analog filters are brought furthermore. various complex illustrations advertise a simple comprehension. This publication might be of worth to engineers and researchers in in addition to scientists and Ph.D scholars at universities. The ebook can be recommendable to graduate scholars specializing on nanoelectronics, microelectronics or circuit engineering.

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As can be seen clearly, the excess phase increases the quality factor. 25° at maximum is allowed. 1 Realized Gm -C Filter 1 A 3rd-order filter was realized by a cascade connection of a second-order filter and a first-order filter [58]. The filter architecture is shown in Fig. 9. The transconductors were realized in the same way as described in Sect. 6 (the representation is shown in Fig. 14). For the transconductors Gm0 , Gm1 only one common-mode feedback together was used. To achieve the exact filter parameters a digitally programmable concept is developed.

8) is 10. 7 dB. But it should be taken into account that the transit frequency of the operational amplifiers should be at least 10 times larger than the filter cut-off frequency which means that the current consumption will increase at higher frequencies. In [71] another technique to enhance the linearity of an OTA is presented. It is based on the cancellation of two differently biased cross-coupled differential pairs (see Fig. 5). 10) where vin is the input differential voltage and gm,j is the transconductance of the j th transistor.

The gain of the filter is varied with Gm3 by 2 bits in 4 different steps. In Fig. 11(b) the chip photograph and the layout plot of the realized chip are shown. All capacitors were realized as metal-metal capacitors. The chip area of the whole chip is 650 µm × 540 µm, the chip area of the filter is 270 µm × 140 µm. 5 V. 12 shows the measured DC transfer characteristics. For a differential input voltage of ±500 mV the curve is linear. In Fig. 13 the amplitude frequency response of the filter, where the gain of the filter is varied and the cut-off frequency is constant, is shown.

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