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Extra resources for 68000, 68010, 68020 Primer
And CRT displays. 30 68000, 680 10, and 68020 Primer Addresses ~ o 1 Contents 01 memory N-~=,----_ 65 ,535 - Fig. J Addressing 64 K-Byte Memory ADDRESSING MEMORY As you saw in the read/write cycles, the main characteristic of RAM is that the MPU can read and write data from and to RAM. To determine which of the many byte locations it needs to access, each byte (or group of bytes) is given an address. A 64K-byte memory can be thought of as 65,536 mailboxes, numbered 0 thru 65,535. Inside each mailbox is a byte (8 bits) holding data (256 possible characters, remember) .
BREAK W ITH T H E PAST The MACSS team made the big decision to break away from the past and to create, from scratch as it were, the best possible 16-hit design. The sole concession to the 8-bit MC6800 customer base was the provision of timing circuits to handle the slower synchronous MC6800 peripherals. Although M68000 soft- ware VJOUld have to be developed from zero, at least there would be a wide range of 110 devices a nd support chips already in situ. This break with the past was a gamble in many ways, but it addressed the reality that the 8-bit micro had evolved in a rather ad hoc fashion, during a period when the programmer's needs took second place to the hardware designer's requirements.
Sand C also take the values 0 and 1, follOVJi ng our rules for binary addition. We note that S is the EOR (Exclusive OR) of A,B, while C is AAB. The circuit in Rgure 1-6 is obtained by replacing the Boolean symbols with their silicon equivalents - 2 AND-gates, 1 OR-gate and 1 invertet What is even more remarkable is that with Ie technology many thousands of such circuits can be integrated into a tiny mass-produced chip. -/ input at 0 Flop! -/ input at 1 Fig. 1-7 Basic Flip-Flop The half-adder drcuit in Figure 1-6 just adds tvJo bits together, but it is not difficult to cascade similar circuits in series to give full binary addition of 8 or 16 bits depending on the chip's architecture.